Ionizing radiation can cause single event upsets (SEUs) as well as total failure resulting from total dose (long accumulation of radiation) in semiconductor ICs. Ionizing radiation can directly upset storage circuits, such as SRAMs, register files and flip-flops. Moreover, radiation events in combinational logic create voltage glitches that can be latched. SEUs may cause the IC to perform incorrect or illegal operations; whereas, an accumulation of radiation over a long period of time may additionally lead to complete device failure.
By way of a more specific example, due to prolonged radiation exposure (total dose) a charge can build up at an interface between an oxide (STI) and an SOI. This build up will eventually change the charge flow at the SOI interface. This leads to shift in VT of the device. If the Vt is allowed to move further enough from the design point, the circuitry can fail to operate.
Methods to prevent SEUs and total dose include adding spatial and/or temporal redundancy, so that a single radiation event cannot cause an SEU. Redundancy solutions incur area, power and performance penalties. Consequently, there is a need to improve detection schemes of radiation events in ICs.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.